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Transition bins creation : Default sequence
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Like default branch in a case statement, default sequence bin captures all the values that are not covered by implicity bin definition. Coverage values hit in default bin are not taken account while reporting coverage. |
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Example : Default sequence bins creation
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1 module test();
2
3 logic [7:0] addr;
4 reg ce;
5
6 covergroup address_cov () @ (posedge ce);
7 ADDRESS : coverpoint addr {
8 // simple transition bin
9 bins adr_0_to_1 = (0=>1);
10 bins adr_1_to_0 = (1=>0);
11 bins adr_1_to_2 = (1=>2);
12 bins adr_2_to_1 = (1=>0);
13 bins allother = default sequence;
14 }
15 endgroup
16
17 address_cov my_cov = new();
18
19 initial begin
20 ce <= 0;
21 addr <= 0;
22 $monitor("ce %b addr 8'h%x",ce,addr);
23 repeat (10) begin
24 ce <= 1;
25 #10 ;
26 ce <= 0;
27 addr ++;
28 #10 ;
29 end
30 end
31
32 endmodule
You could download file default_sequence_bin.sv here
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Simulation : Default sequence bins creation
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ce 1 addr 8'h00
ce 0 addr 8'h01
ce 1 addr 8'h01
ce 0 addr 8'h02
ce 1 addr 8'h02
ce 0 addr 8'h03
ce 1 addr 8'h03
ce 0 addr 8'h04
ce 1 addr 8'h04
ce 0 addr 8'h05
ce 1 addr 8'h05
ce 0 addr 8'h06
ce 1 addr 8'h06
ce 0 addr 8'h07
ce 1 addr 8'h07
ce 0 addr 8'h08
ce 1 addr 8'h08
ce 0 addr 8'h09
ce 1 addr 8'h09
ce 0 addr 8'h0a
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Report : Default sequence bins creation
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===========================================================
Group : test::address_cov
===========================================================
SCORE WEIGHT GOAL
50.00 1 100
-----------------------------------------------------------
Summary for Group test::address_cov
CATEGORY EXPECTED UNCOVERED COVERED PERCENT
Variables 4 2 2 50.00
Variables for Group test::address_cov
VARIABLE EXPECTED UNCOVERED COVERED PERCENT GOAL WEIGHT
ADDRESS 4 2 2 50.00 100 1
-----------------------------------------------------------
Summary for Variable ADDRESS
CATEGORY EXPECTED UNCOVERED COVERED PERCENT
User Defined Bins 4 2 2 50.00
User Defined Bins for ADDRESS
Uncovered bins
NAME COUNT AT LEAST NUMBER
adr_2_to_1 0 1 1
adr_1_to_0 0 1 1
Covered bins
NAME COUNT AT LEAST
adr_1_to_2 1 1
adr_0_to_1 1 1
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
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Do you have any Comment? mail me at:deepak@asic-world.com
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