What's new in Verilog 2001

Comma used in sensitive list

Combinational logic sensitive list

Register Data type

	Signed shift operator
	Power operator

Port Declaration

Generate Blocks

Multi-Dimension Array

Re-entrant tasks and recursive functions

	Example : Task
	Example : Function

In-line parameter passing by name

Random Generator

	Example : Verilog FileIO
	Input File
	Expected Output File

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