Ports And Signals

	Example : Accessing Ports/Signals
	Simulation Output: Accessing Ports/Signals

	Example : Array Of Ports/Signals
	Simulation Output : Array Of Ports/Signals

	Resolve of Logic Values
	Example : Resolved Logic Vectors

	Example : Resolved Vector Signals
	Simulation Output : Resolved Vector Signals

	Example : Signal Binding
	Simulation Output : Signal Binding

	Example : Clocks
	Simulation Output : Clocks

Do you have any Comment? mail me at:deepak@asic-world.com