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  ../images/main/bullet_green_ball.gif Universal Gates

Universal gates are the ones which can be used for implementing any gate like AND, OR and NOT, or any combination of these basic gates; NAND and NOR gates are universal gates. But there are some rules that need to be followed when implementing NAND or NOR based gates.

   

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To facilitate the conversion to NAND and NOR logic, we have two new graphic symbols for these gates.

   

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NAND Gate

../images/digital/gates_nand_unv.gif
   

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NOR Gate

../images/digital/gates_nor_unv.gif
   

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  ../images/main/bulllet_4dots_orange.gif Realization of logic function using NAND gates

Any logic function can be implemented using NAND gates. To achieve this, first the logic function has to be written in Sum of Product (SOP) form. Once logic function is converted to SOP, then is very easy to implement using NAND gate. In other words any logic circuit with AND gates in first level and OR gates in second level can be converted into a NAND-NAND gate circuit.

   

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Consider the following SOP expression

   

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F = W.X.Y + X.Y.Z + Y.Z.W

   

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The above expression can be implemented with three AND gates in first stage and one OR gate in second stage as shown in figure.

   

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../images/digital/gates_sop.gif
   

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If bubbles are introduced at AND gates output and OR gates inputs (the same for NOR gates), the above circuit becomes as shown in figure.

   

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../images/digital/gates_sop2.gif
   

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Now replace OR gate with input bubble with the NAND gate. Now we have circuit which is fully implemented with just NAND gates.

   

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../images/digital/gates_sop3.gif
   

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  ../images/main/bulllet_4dots_orange.gif Realization of logic gates using NAND gates
   

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  ../images/main/bullet_star_pink.gif Implementing an inverter using NAND gate
   

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Input

Output

Rule

(X.X)'

= X'

Idempotent

   

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../images/digital/gates_not_unv.gif
   

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  ../images/main/bullet_star_pink.gif Implementing AND using NAND gates
   

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Input

Output

Rule

((XY)'(XY)')'

= ((XY)')'

Idempotent

= (XY)

Involution

   

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../images/digital/gates_and_unv.gif
   

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  ../images/main/bullet_star_pink.gif Implementing OR using NAND gates
   

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Input

Output

Rule

((XX)'(YY)')'

= (X'Y')'

Idempotent

= X''+Y''

DeMorgan

= X+Y

Involution

   

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../images/digital/gates_or_unv.gif
   

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  ../images/main/bullet_star_pink.gif Implementing NOR using NAND gates
   

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Input

Output

Rule

((XX)'(YY)')'

=(X'Y')'

Idempotent

=X''+Y''

DeMorgan

=X+Y

Involution

=(X+Y)'

Idempotent

   

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../images/digital/gates_nor_unv.gif
   

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  ../images/main/bulllet_4dots_orange.gif Realization of logic function using NOR gates

Any logic function can be implemented using NOR gates. To achieve this, first the logic function has to be written in Product of Sum (POS) form. Once it is converted to POS, then it's very easy to implement using NOR gate. In other words any logic circuit with OR gates in first level and AND gates in second level can be converted into a NOR-NOR gate circuit.

   

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Consider the following POS expression

   

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F = (X+Y) . (Y+Z)

   

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The above expression can be implemented with three OR gates in first stage and one AND gate in second stage as shown in figure.

   

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../images/digital/gates_pos1.gif
   

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If bubble are introduced at the output of the OR gates and the inputs of AND gate, the above circuit becomes as shown in figure.

   

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../images/digital/gates_pos2.gif
   

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Now replace AND gate with input bubble with the NOR gate. Now we have circuit which is fully implemented with just NOR gates.

   

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../images/digital/gates_pos3.gif
   

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  ../images/main/bulllet_4dots_orange.gif Realization of logic gates using NOR gates
   

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  ../images/main/bullet_star_pink.gif Implementing an inverter using NOR gate
   

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Input

Output

Rule

(X+X)'

= X'

Idempotent

   

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../images/digital/gates_not_nor.gif
   

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  ../images/main/bullet_star_pink.gif Implementing AND using NOR gates
   

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Input

Output

Rule

((X+X)'+(Y+Y)')'

=(X'+Y')'

Idempotent

= X''.Y''

DeMorgan

= (X.Y)

Involution

   

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../images/digital/gates_and_nor.gif
   

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  ../images/main/bullet_star_pink.gif Implementing OR using NOR gates
   

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Input

Output

Rule

((X+Y)'+(X+Y)')'

= ((X+Y)')'

Idempotent

= X+Y

Involution

   

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../images/digital/gates_or_nor.gif
   

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  ../images/main/bullet_star_pink.gif Implementing NAND using NOR gates
   

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Input

Output

Rule

((X+Y)'+(X+Y)')'

= ((X+Y)')'

Idempotent

= X+Y

Involution

= (X+Y)'

Idempotent

   

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../images/digital/gates_nand_nor.gif
   

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Copyright 1998-2014

Deepak Kumar Tala - All rights reserved

Do you have any Comment? mail me at:deepak@asic-world.com