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Logical Operators
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VERA like Verilog supports following logical operators. Like in Verilog VERA logical operators are used in 'if-else' and 'while' conditional control statements;  | 
 
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-  && : Logical AND
 
-  || : Logical OR
 
-  !  : Logical Inversion
 
 
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Logical operators follow following rules  | 
 
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-  Result of logical operator is always true '1'  or false '0'
 
-  When both input are '1', then output is '1' for Logical AND
 
-  When any one of input are '1', then output is '1' for Logical OR
 
-  When input is 'x' or 'z', then output is 'X' for Logical inversion
 
 
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Example : Logical Operators
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  1 program logical {
  2   bit [1:0] a, b;
  3   integer count = 5;
  4   // Assign some value to a. b
  5   a = 1;
  6   b = 0;
  7   // Use of AND 
  8   if (a && b) {
  9    printf("Both A and B are 1 : %b\n",a && b);
 10   } else {
 11    printf("Both A and B are not 1 : %b\n",a && b);
 12   }
 13   // Use of NOT 
 14   if ( ! (a && b)) {
 15    printf("Both A and B are not 1 : %b\n", ! (a && b));
 16   }
 17   // Use of OR 
 18   if (a || b) {
 19    printf("Either A or B is 1 : %b\n",a || b);
 20   }
 21   // Use in while loop
 22   while (count) {
 23    printf("Value of Count %d\n",count);
 24    count --;
 25   }
 26 
 27 }
You could download file logical.vr here
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Simulation :  Logical Operators
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 Both A and B are not 1 : 0
 Both A and B are not 1 : 1
 Either A or B is 1 : 1
 Value of Count           5
 Value of Count           4
 Value of Count           3
 Value of Count           2
 Value of Count           1
 
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Copyright © 1998-2025  | 
 
Deepak Kumar Tala - All rights reserved  | 
 
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 Do you have any Comment? mail me at:deepak@asic-world.com
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