1 #ifndef COUNTER_TB_EXPORTS_H
  2 #define COUNTER_TB_EXPORTS_H
  3 
  4 #ifdef __cplusplus
  5 extern "C" {
  6 #endif
  7 void init_sc     ();
  8 void exit_sc     ();
  9 void sample_hdl  (void *Invector);
 10 void drive_hdl   (void *Outvector);
 11 void advance_sim (unsigned long simtime);
 12 void exec_sc     (void *invector, void *outvector, unsigned long simtime);
 13 #ifdef __cplusplus
 14 }
 15 #endif
 16 
 17 #endif

  1 #ifndef COUNTER_TB_PORTS_H
  2 #define COUNTER_TB_PORTS_H
  3 
  4 // Define Complex Type of Input and Out for DUT
  5 struct tagInput {
  6   unsigned long  clk;
  7   unsigned long  d_out;
  8 };
  9 
 10 struct tagOutput {
 11   unsigned long  rst;
 12   int done;
 13 };
 14 
 15 typedef struct tagInput    INVECTOR;
 16 typedef struct tagOutput  OUTVECTOR;
 17 
 18 #endif

  1 #include "systemc.h"
  2 #include "counter.h"
  3 
  4 #include "counter_tb_ports.h"
  5 #include "counter_tb_exports.h"
  6 #include "strings.h"
  7 
  8 // Instantiate Top-Level DUT
  9 counter  u_counter("u_counter");
 10 
 11 // Declare Signals
 12 sc_signal<bool>      clk;
 13 sc_signal<bool>      rst;
 14 sc_signal<sc_uint<32> >    d_out;
 15 sc_signal<int>      done;
 16   
 17 // Top-Level testbench
 18 void init_sc() {
 19   // Port mapping
 20   u_counter.clk(clk);
 21   u_counter.rst(rst);
 22   u_counter.d_out(d_out);
 23   u_counter.done(done);
 24   // VCD Tracing:
 25   sc_trace_file* tf;
 26   tf = sc_create_vcd_trace_file("sc_counter");
 27         ((vcd_trace_file*)tf)->sc_set_vcd_time_unit(-9);
 28   //   Signals to be traced
 29   sc_trace(tf, clk, "clk");
 30   sc_trace(tf, rst, "rst");
 31   sc_trace(tf, d_out, "d_out");
 32   // Initialize SC
 33   sc_start(0);
 34   cout<<"@"<<sc_time_stamp()<<" Started SystemC Schedular"<<endl;
 35 }
 36 
 37 void sample_hdl(void *Invector) {
 38   INVECTOR *pInvector = (INVECTOR *)Invector;
 39   clk.write(pInvector->clk);
 40   d_out.write(pInvector->d_out);
 41 }
 42 
 43 void drive_hdl(void *Outvector) {
 44   OUTVECTOR *pOutvector = (OUTVECTOR *)Outvector;
 45   pOutvector->rst  =  rst.read()? 1 : 0;
 46   pOutvector->done =  done;
 47 }
 48 
 49 void advance_sim(unsigned long simtime) {
 50   sc_start(simtime);
 51 }
 52 
 53 void exec_sc(void *invector, void *outvector, unsigned long simtime) {
 54   sample_hdl(invector);    // Input-Stimuli
 55   advance_sim(simtime);   // Advance Simulator
 56   drive_hdl(outvector);  // Output Vectors
 57 }
 58 
 59 void exit_sc() {
 60   cout<<"@"<<sc_time_stamp()<<" Stopping SystemC Schedular"<<endl;
 61   sc_stop();
 62 }

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